Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform

—Various instruction and transaction based power estimation techniques for processor and on-chip buses have been proposed in the past. In this paper, we propose a heterogeneous power model to estimate the power utilized by complete processor based reconfigurable System-on-Chip (SoC) platform. The proposed model estimates the power consumed by the SoC platform using instruction-based model as well as transactionbased model. In addition we estimate the power consumed by various bus arbitration policies used in the on-chip communication.

• Type: Conference
• Year: 2007
• Where: ISCAS
• Authors: Prakash Srinivasan, Ali Ahmadinia, Ahmet T. Erdogan, Tughrul Arslan
• Keywords: Heterogeneous Power Model, ISCAS 2007, On-chip Buses, Transaction Based Power