Integrity and Integration Issues for Nano-Tube Based Interconnect Systems

: As we continue miniaturization of circuits into nano-scale, interconnects have been recognized as the limiting factor for next generation of computing structures. To increase the density of integration many approaches have been proposed such as System on Chip (SoC), System in Package (SIP), and Networks on Chip (NoC)- which all must address the interconnect issue address. Current approaches to SoC has its limitations as they introduce multiple system limits as architecture, switching energy, heat removal, clock frequency, chip size leave very limited alternatives in the design space. In the long term, the impact of size effects on interconnect structures must be mitigated. In terms of interconnect structures, activated bonding, air gap, carbon nano-tubes, molecular wires, optical interconnects, and spin-wave buses have been proposed. For long distance interconnect, biometric and communications-based schemes are being investigated. In this paper, we discuss carbon nano-tube based inte...

• Type: Conference
• Year: 2006
• Where: CDES
• Authors: Tulin Mangir
• Keywords: CDES 2006, CDES 2007, Interconnect Issue Address, Interconnect Structures, Interconnects