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    CDES
    2006
    118views Hardware» more  CDES 2006»
    Improving the System Performance by a Dynamic File Prediction Model
    14 years 25 days ago
    Improving the System Performance by a Dynamic File Prediction Model
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    As the speed gap between CPU and I/O is getting wider and wider, I/O latency plays a more important role to the overall system performance than it used to be. Prefetching consecut...
    Tsozen Yeh, Joseph Arul, Kuo-Hsin Tien, I-Fan Chen...
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    CDES
    2006
    89views Hardware» more  CDES 2006»
    Autonomous Instruction Memory Equipped with Dynamic Branch Handling Capability
    14 years 25 days ago
    Autonomous Instruction Memory Equipped with Dynamic Branch Handling Capability
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    Memory accesses have always been a speed-limiting factor, and memory bandwidth has always been an intensively contended scarce resource. Nevertheless, with recent pervasive emergen...
    Hui-Chin Yang, Chung-Ping Chung
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    CDES
    2006
    184views Hardware» more  CDES 2006»
    Compilation for Future Nanocomputer Architectures
    14 years 25 days ago
    Compilation for Future Nanocomputer Architectures
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    Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
    Thomas P. Way
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    CDES
    2006
    99views Hardware» more  CDES 2006»
    Teraflop Computing for Nanoscience
    14 years 25 days ago
    Teraflop Computing for Nanoscience
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    : Over the last three decades there has been significant progress in the first principles methods for calculating the properties of materials at the quantum level. They have largel...
    Yang Wang 0008, G. M. Stocks, Aurelian Rusanu, D. ...
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    CDES
    2006
    108views Hardware» more  CDES 2006»
    MolML: An Abstract Scripting Language for Assembly of Mechanical Nanocomputer Architectures
    14 years 25 days ago
    MolML: An Abstract Scripting Language for Assembly of Mechanical Nanocomputer Architectures
    Download  www.csc.villanova.edu
    Bryan W. Wagner, Thomas P. Way
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    CDES
    2006
    108views Hardware» more  CDES 2006»
    RHT: A Context-Based Return Address Predictor
    14 years 25 days ago
    RHT: A Context-Based Return Address Predictor
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    Mohamed M. Zahran, Manoj Franklin
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    CDES
    2006
    98views Hardware» more  CDES 2006»
    Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer
    14 years 25 days ago
    Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer
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    Recently, several loop buffer designs have been proposed to reduce instruction fetch energy due to size and location advantage of loop buffer. Nevertheless, on design complexity di...
    Bin-Hua Tein, I-Wei Wu, Chung-Ping Chung
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    CDES
    2006
    97views Hardware» more  CDES 2006»
    Protein Secondary Structure Prediction Accuracy versus Reduction Methods
    14 years 25 days ago
    Protein Secondary Structure Prediction Accuracy versus Reduction Methods
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    Predicting protein secondary structure is a key step in determining the 3D structure of a protein that determines its function. The Dictionary of Secondary Structure of Proteins (...
    Saad Osman Abdalla Subair, Safaai Deris
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    CDES
    2006
    136views Hardware» more  CDES 2006»
    CMOL FPGA circuits
    14 years 25 days ago
    CMOL FPGA circuits
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    Abstract--This paper describes an architecture of FPGAlike fabric for future hybrid "CMOL" circuits. Such circuits will combine a semiconductor-transistor (CMOS) stack an...
    Dmitri B. Strukov, Konstantin Likharev
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    CDES
    2006
    91views Hardware» more  CDES 2006»
    Survey and Evaluation of Low-Power Flip-Flops
    14 years 25 days ago
    Survey and Evaluation of Low-Power Flip-Flops
    Download  www.ece.ucdavis.edu
    We survey a set of flip-flops designed for low power and high performance. We highlight the basic features of these flip-flops and evaluate them based on timing characteristics, po...
    Ahmed Sayed, Hussain Al-Asaad
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