An Interactive Model Re-Coder for Efficient SoC Specification

To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation. However, while much work has focused on synthesis and exploration tools, little has been done to support the designer in writing and rewriting SoC models. In fact, our studies on industrial size examples have shown that about 90% of the system design time is spent on coding and re-coding of SLDL models, even in the presence of algorithms given in the form of C code. Since the quality of the design model has tremendous impact on the cost and quality of the resulting system implementation, creating and optimizing the model is a critical task toward successful SoC design. In this paper, we present an interactive source re-coder which integrates static analysis and code transformation tools into an editor to assist the designer in tedious modeling and optimization tasks. This novel approach allows the designer ...

• Type: Conference
• Year: 2007
• Where: IESS
• Authors: Pramod Chandraiah, Rainer Dömer
• Keywords: Embedded Systems, IESS 2007, Industrial Size Examples, SoC Models, Successful Soc Design