A low-power geometric mapping co-processor for high-speed graphics application

Abstract— In this article we present a novel design of a lowpower geometric mapping co-processor that can be used for high-performance graphics system. The processor can carry out any single or a combination of transformations belonging to affine transformation family ranging from 1-D to 3-D. It allows interactive operations which can be defined either by a user (allowing it to be a stand-alone geometric transformation processor) or by a host processor (allowing it to be a co-processor to accelerate certain graphics operations). It occupies a silicon area of 6 mm2 and consumes 40 mW power when synthesized with 0.25µm technology.

• Type: Conference
• Year: 2006
• Where: ISCAS
• Authors: S. Leeke, L. Maharatna
• Keywords: Affine Transformation, Geometric Mapping Co-processor, Geometric Transformation Processor, ISCAS 2006