Low power logic synthesis for XOR based circuits

An abundance of research e orts in low power logic synthesis have so far been focused on and or or nand nor based logic. A typical approach is to rst generate an initial multi-level and or or nand nor representation of a boolean function. Next, the representation is optimized in terms of power. However, there are major classes of circuits such as arithmetic functions which have sizable and or representations but have very compact and xor representations. For these functions and or based optimization approach often yields poor results. In this paper, we put forth a paradigm for low power logic synthesis based on and xor representations of boolean functions. Specifically, we propose transforming a boolean function into a Fixed Polarity Reed Muller form that allows us to efciently synthesize xor trees and and trees with provably minimum switching activity. Preliminary experimental results show that we attain good power savings with negligible area overhead and often area reduction when c...

• Type: Conference
• Year: 1997
• Where: ICCAD
• Authors: Unni Narayanan, C. L. Liu
• Keywords: Boolean Function, Hardware, ICCAD 1997, Low Power Logic, Power Logic Synthesis