In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied to the probabilistic distributions of the cycle-by-cycle power consumption, the maximum likelihood estimation, and the MonteCarlo simulation. It can predict the maximum power in the space of constrained input vector pairs as well as the complete space of all possible input vector pairs. The simulation-based nature of the proposed method allows it to avoid the limitations of a gate-level delay model and a gate-level circuit structure. Last, but not least, the proposed method can produce maximum power estimates to satisfy user-specified error and confidence levels. Experimental results show that this method, on average, produces maximum power estimates within 5% of the actual value and with a 90% confidence level, by simulating only about 2500 vector pairs.