Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines

The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive benchmarks to evaluate a mixed logic and DRAM processor called VIRAM as a building block for scientific computing. For each benchmark, we explore the fundamental hardware requirements of the problem as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. Results indicate that VIRAM is significantly faster than conventional cachebased machines for problems that are truly limited by the memory system and that it has a significant power advantage across all the benchmarks.

• Type: Conference
• Year: 2002
• Where: IPPS
• Authors: Brian R. Gaeke, Parry Husbands, Xiaoye S. Li, Leonid Oliker, Katherine A. Yelick, Rupak Biswas
• Keywords: Distributed And Parallel Computing, IPPS 2002, Memory Access Patterns, Memory Performance, Processor Called Viram