| A methodology for FPGA to structured-ASIC synthesis and verification Recent countries visiting this post |  |
 | 6 | United States |
 | 3 | Vietnam |
 | 1 | Japan |
| A methodology for FPGA to structured-ASIC synthesis and verification Recent countries visiting this post | |
| 6 | United States |
| 3 | Vietnam |
| 1 | Japan |