Microprocessors in the era of terascale integration

Moore’s Law will soon deliver tera-scale level transistor integration capacity. Power, variability, reliability, aging, and testing will pose as barriers and challenges to harness this integration capacity. Advances in microarchitecture and programming systems discussed in this paper are potential solutions.

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Shekhar Borkar, Norman P. Jouppi, Per Stenström
• Keywords: DATE 2007, Hardware, Integration Capacity, Moore’s Law, Transistor Integration Capacity