Multi-Vector Tests: A Path to Perfect Error-Rate Testing

The importance of testing approaches that exploit error tolerance to improve yield has previously been established. Error rate, defined as the percentage of vectors for which the value at a circuit’s output deviates from the corresponding error-free value, has been identified as a key metric for severity. In error-rate testing every chip that has an error rate greater than or equal to a threshold specified by the application is unacceptable for the application and discarded; all other chips are acceptable. The objective of error-rate testing is to reject every unacceptable chip while accepting all (or a maximum number) of the acceptable chips. We previously showed that it is not always possible to generate a test set that detects all unacceptable faults, i.e., faults that cause an error rate greater than or equal to the threshold error rate, without detecting some of the acceptable faults, i.e., faults that cause an error rate less than the threshold. In this paper, we introduce ...

• Type: Conference
• Year: 2008
• Where: DATE
• Authors: Shideh Shahidi, Sandeep Gupta
• Keywords: DATE 2008, Error Rate, Error-rate Testing, Hardware, Unacceptable Faults