IDDQ test loses its effectiveness for deep sub-micron chips since it cannot distinguish between faulty and fault-free currents. The concept of current ratios, in which the ratio of maximum to minimum IDDQ is used to screen faulty chips, has been previously proposed. At the wafer level neighboring chips have similar fault-free properties and are correlated. In this paper, use of spatial correlation in combination with current ratios is investigated. By differentiating chips based on their nonconformance to local IDDQ variation, outliers are identified. The analysis of SEMATECH data is presented.
Sagar S. Sabade, D. M. H. Walker