A New Threshold Voltage Model for Omega Gate Cylindrical Nanowire Transistor

In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long channel cylindrical body structure. The potential distribution at each and every point of the of the wire is derived with a closed form solution of two dimensional Poisson's equation, which is then used to model the threshold voltage. Proposed model can be treated as a generalized model, which is valid for both surround gate and semi-surround gate cylindrical transistors. The accuracy of proposed model is verified for different device geometry against the results obtained from three dimensional numerical device simulators and close agreement is observed.

• Type: Conference
• Year: 2008
• Where: VLSID
• Authors: Biswajit Ray, Santanu Mahapatra
• Keywords: Computer Architecture, Gate Cylindrical Transistors, Gate Silicon Nanowire, Threshold Voltage Model, VLSID 2008