Online design bug detection: RTL analysis, flexible mechanisms, and evaluation

Higher level of resource integration and the addition of new features in modern multi-processors put a significant pressure on their verification. Although a large amount of resources and time are devoted to the verification phase of modern processors, many design bugs escape the verification process and slip into processors operating in the field. These design bugs often lead to lower quality products, lower customer satisfaction, diminishing brand/company reputation, or even expensive product recalls. This paper proposes a flexible, low-overhead mechanism to detect the occurrence of design bugs during on-line operation. First, we analyze the actual design bugs found and fixed in a commercial chipmultiprocessor, Sun’s OpenSPARC T1, to understand the behavior and characteristics of design bugs. Our RTL analysis of design bugs shows that the number of signals that need to be monitored to detect design bugs is significantly larger than suggested by previous studies that analyz...

• Type: Conference
• Year: 2008
• Where: MICRO
• Authors: Kypros Constantinides, Onur Mutlu, Todd M. Austin
• Keywords: Actual Design Bugs, Design Bug, Hardware, MICRO 2008, OpenSPARC T1 Chip