Optimal MTCMOS Reactivation Under Power Supply Noise and Performance Constraints

Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle power mode transition reduces wake-up latency, it originates large discharge current spikes, thereby causing IR-drop and inductive ground bounce for the surrounding circuit blocks. We propose a new reactivation solution which helps in controlling power supply fluctuations and in achieving minimum reactivation times. Our structure limits the turn-on current below a given threshold through sequential activation of the sleep transistors, which are connected in parallel and are sized using a novel optimal sizing algorithm. The proposed methodology is validated using HSPICE simulations of several benchmark circuits, which have been synthesized onto a commercial 65nm CMOS technology library.

• Type: Conference
• Year: 2008
• Where: DATE
• Authors: Andrea Calimera, Luca Benini, Enrico Macii
• Keywords: DATE 2008, Hardware, Sleep Transistor Insertion, Sleep Transistors, Stand-by Leakage Power