Optimization of Machine Descriptions for Efficient Use

A machine description facility allows compiler writers to specify machine execution constraints to the optimization and scheduling phases of an instruction-level parallelism (ILP) optimizing compiler. The machine description (MDES) facility should support quick development and easy maintenance of machine execution constraint descriptions by compiler writers. However, the facility should also allow compact representation and efficient usage of the MDES during compilation. This paper advocates a model that allows compiler writers to develop the MDES in a high-level language, which is then translated into a low-level representation for efficient use by the compiler. The discrepancy between the requirements of the high-level language and the low-level representation is reconciled with a collection of transformations that derive efficient low-level representations from the easy-to-understand high-level descriptions. In order to support these transformations, a novel approach to representin...

• Type: Conference
• Year: 1996
• Where: MICRO
• Authors: John C. Gyllenhaal, Wen-mei W. Hwu, B. Ramakrishna Rau
• Keywords: Compiler Writers, Hardware, Low-level Representations, Machine Execution Constraints, MICRO 1996