Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation

In this paper, we present a method to estimate the number of reconfiguration steps that a time-constrained algorithm can accommodate. This analysis demonstrates how one would attack the problem of partitioning a particular algorithm into pieces to for run time reconfiguration execution on a Atmel 40K FPGA. Our method consist in evaluating algorithm operators execution time from data flow graph. So, we deduce the reconfiguration number and the algorithm partitioning for RTR implementation. The algorithm used in this work, is a qualitative motion estimator in the Log-Polar plane.

• Type: Conference
• Year: 2000
• Where: IPPS
• Authors: Camel Tanougast, Yves Berviller, Serge Weber
• Keywords: Algorithm, Algorithm Operators Execution, Distributed And Parallel Computing, IPPS 2000, Time Reconfiguration Execution