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VLSI 2010
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Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip
13 years 5 months ago
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tx.technion.ac.il
Amit Berman, Ran Ginosar, Idit Keidar
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23 May 2011
Updated
23 May 2011
Type
Journal
Year
2010
Where
VLSI
Authors
Amit Berman, Ran Ginosar, Idit Keidar
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