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1998
IEEE

A path analysis based partitioning for time constrained embedded systems

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A path analysis based partitioning for time constrained embedded systems
The HW/SW partitioning problem addressed in this paper is one of the key steps in the co-design flow of heterogeneous embedded systems. Generally the aim is to provide solutions that respect timing constraints and minimize an objective function such as the total area and/ or the power consumption. Minimizing the hardware area conflicts with reducing execution time. Therefore, we introduce an heuristic for synthesizing heterogeneous systems that uses a global metric to guide the mapping of tasks according to the reusability of components and the time margin induced by timing constraints.
Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pega
Added 04 Aug 2010
Updated 04 Aug 2010
Type Conference
Year 1998
Where CODES
Authors Luc Bianco, Michel Auguin, Guy Gogniat, Alain Pegatoquet
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