Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core

Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commercially available customizable processors have communication overheads in their interface with the specialized hardware. However, existing ISE generation approaches have not considered customizable processors that have communication overheads at their interface. Furthermore, they have not characterized the energy benefits of such ISEs. We present a softprocessor customization framework that takes an input `C' application and realizes a customized processor capturing the microarchitectural details of its interface with the specialized unit. We are able to accurately measure the speedup, energy, power and code size benefits of our ISE approach on a real system implementation by applying the design flow to a popular Xilinx Microblaze soft-processor core synthesized for four real-life applications. We show th...

• Type: Conference
• Year: 2006
• Where: VLSID
• Authors: Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, Paolo Ienne, Laura Pozzi
• Keywords: Communication Overheads, Computer Architecture, ISE Approach, ISE Generation Approaches, VLSID 2006