Performance-complexity analysis in hardware-software codesign for real-time systems

The paper presents an approach for performance and complexity analysis of hardware/software implementations for real-time systems on every stage of the partitioning. There are two main features of the approach. The first one is the rapid performancecomplexity estimations for software based on the set of introduced stochastic characteristics. The second one is the systematic exploration of the codesign space, that enables to determine the partition process direction. These properties allow the renovation of the codesegment candidate list for hardware implementation during the partitioning with internal representation transformations, and the significant design space reduction.

• Type: Conference
• Year: 1995
• Where: EURODAC
• Authors: Victor V. Toporkov
• Keywords: Codesegment Candidate List, EURODAC 1995, Partition Process Direction, Rapid Performancecomplexity Estimations, VHDL