Pipeline morphing and virtual pipelines

Abstract. Pipeline morphing is a simple but e ective technique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency associated with emptying and re lling a pipeline can be avoided. We show how morphing can be applied to linear and mesh pipelines at both word-level and bit-level, and explain how this method can be implemented using Xilinx 6200 FPGAs. We also present an approach using morphing to map a large virtual pipeline onto a small physical pipeline, and the trade-o s involved are discussed.

• Type: Conference
• Year: 1997
• Where: FPL
• Authors: Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K. Cheung
• Keywords: FPL 1997, Hardware, Large Virtual Pipeline, Pipeline Morphing, Xilinx 6200 Fpgas