Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems

Abstract— Integrating optical interconnects into the nextgeneration multi-/many-core architecture has been considered a viable solution to addressing the limitations in throughput, latency, and power efficiency of electrical interconnects. Optical interconnects also allow the performance growth of inter-core connectivity to keep pace with the growth of the cores’ processing ability. However, variations in the fabrication process significantly impair an optical network’s communication quality. Existing post-fabrication tuning methods, which are based on adjusting the voltages and temperatures, have very limited tunability and require excessive power to fully compensate for the variation. In this paper, we study the sources and severity of process variation, and propose two methods to enhance the robustness of an on-chip optical network: 1) adding spare modulators and detectors for post-fabrication reconfiguration and low-power tuning, and 2) introducing a combined detector/modulat...

• Type: Journal
• Year: 2012
• Where: ASPDAC
• Authors: Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amirali Ghofrani, Shiyuan Yang, Kwang-Ting Cheng
• Keywords: ASPDAC 2012, Core Architecture, Excessive Power, Hardware, Power Efficiency