Power emulation: a new paradigm for power estimation

In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the observation that most power estimation tools typically perform the following sequence of operations: simulating the circuit to obtain value traces or statistics for the inputs of its constituent components, evaluating power models for each circuit component based on the input values seen during simulation, and aggregating the power consumption of individual components to compute the circuit's power consumption. We further recognize that the steps involved in power estimation (power model evaluation, aggregation) can themselves be thought of as synthesizable functions and implemented as hardware circuits. Thus, any given design can be enhanced by adding to it "power estimation hardware", and the resulting power model enhanced circuit can be mapped onto a hardware prototyping platform. While drastic s...

• Type: Conference
• Year: 2005
• Where: DAC
• Authors: Joel Coburn, Srivaths Ravi, Anand Raghunathan
• Keywords: Commercial Power Estimation, DAC 2005, Design Automation, Power Estimation Hardware, Power Estimation Tools