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VLSID
2002
IEEE

Probabilistic Analysis of Rectilinear Steiner Trees

15 years 24 days ago
Probabilistic Analysis of Rectilinear Steiner Trees
Steiner tree is a fundamental problem in the automatic interconnect optimization for VLSI design. We present a probabilistic analysis method for constructing rectilinear Steiner trees. The best solution under statistical sense is obtained for any given set of N points. Experiments show that our results are better than those by the previous technique or very close to the optima.
Chunhong Chen
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2002
Where VLSID
Authors Chunhong Chen
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