RAPPID: An Asynchronous Instruction Length Decoder

This paper describes an investigation of potential advantages and risks of applying an aggressive asynchronous design methodology to Intel Architecture. RAPPID ("Revolving Asynchronous Pentium

• Type: Conference
• Year: 1999
• Where: ASYNC
• Authors: Shai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun
• Keywords: Aggressive Asynchronous Design, ASYNC 1999, Asynchronous Pentium® Processor, Hardware, Prototype Ia32 Instruction