A real system evaluation of hardware atomicity for software speculation

In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate into an x86 binary-translation system. Furthermore, doing so trivially enables additional optimization opportunities beyond that achievable by a high-performance dynamic optimizer, which already implements superblocks. We show that atomic regions can suffer from severe performance penalties if misspeculations are left uncontrolled, but that a simple software control mechanism is sufficient to reign in all detrimental side-effects. We evaluate using full reference runs of the SPEC CPU2000 integer benchmarks and find that atomic regions enable up to a 9% (3% on average) improvement beyond the performance of a tuned product. These performance improvements are achieved without any negative side effects. Performance side effects such as code bloat are absent with atomic regions; in fact, static code size is reduc...

• Type: Conference
• Year: 2010
• Where: ASPLOS
• Authors: Naveen Neelakantam, David R. Ditzel, Craig B. Zilles
• Keywords: ASPLOS 2010, Atomic Region Compiler, Atomic Regions, Programming Languages, Severe Performance Penalties