Realizable reduction for RC interconnect circuits

Interconnect reduction is an important step in the design and analysis of complex interconnects found in present-day integrated circuits. This paper presents techniques for obtaining realizable and accurate reduced models for two-port and multi-port RC circuits. The proposed method is also particularly suitable for interconnect reduction for nonlinear circuit simulation and for interconnect postprocessing in a parasitic extractor. The method has two limitations. First, it only considers the first few moments of the transfer function; however, that is accurate enough for RC circuits. Second, the amount of interconnect reduction is topology dependent. Although, most onchip interconnect topologies are well suited for the method proposed. Accuracy and efficiency of the proposed method is demonstrated for various realistic examples.

• Type: Conference
• Year: 1999
• Where: ICCAD
• Authors: Anirudh Devgan, Peter R. O'Brien
• Keywords: Hardware, ICCAD 1999, Interconnect Reduction, Multi-port Rc Circuits, RC Circuits