Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

20

DAC
2010
ACM

favoriteEmaildiscussreport

140views Computer Architecture» more DAC 2010»

Recovery-driven design: a power minimization methodology for error-tolerant processor modules

14 years 3 months ago

Recovery-driven design: a power minimization methodology for error-tolerant processor modules

Download vlsicad.ucsd.edu

Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, Jo

Real-time Traffic

Computer Architecture | DAC 2010 |

claim paper

Post Info
More Details (n/a)

Added	15 Aug 2010
Updated	15 Aug 2010
Type	Conference
Year	2010
Where	DAC
Authors	Andrew B. Kahng, Seokhyeong Kang, Rakesh Kumar, John Sartori

Comments (0)