Identifying repeating structural regularities in circuits allows the minimization of synthesis, optimization, and layout e orts. We introduce in this paper a novel method for identifying a set of repeating circuit structures, referred to as templates, and we report on using an e cient binate cover solver to select an appropriate subset of templates with which to cover the circuit. Our approach is comprised of three steps. First, the circuit graph is decomposed in a hierarchical inclusion parse tree using a clan-based decomposition algorithm. This algorithm discovers clans, grouping of nodes in the circuit graph that have a natural a nity towards each other. Second, the parse tree nodes are classi ed into equivalence classes. Such classes represent templates suitable for circuit covering. The nal step consists of using a binate cover solver to nd an appropriate cover. The cover will consist of instantiated templates and gates that cannot be covered by any templates. We describe the resu...