Relative Timing

Relative Timing is introduced as an informal method for aggressive asynchronous design. It is demonstrated on three example circuits (C-Element, FIFO, and RAPPID Tag Unit), facilitating transformations from speed-independent circuits to burst-mode, relative timed, and pulse-mode circuits. Relative timing enables improved performance, area, power and testability in all three cases.

• Type: Conference
• Year: 1999
• Where: ASYNC
• Authors: Ken S. Stevens, Shai Rotem, Ran Ginosar
• Keywords: Aggressive Asynchronous Design, ASYNC 1999, Hardware, Relative Timing, Relative Timing Enables