RT-Level ITC'99 Benchmarks and First ATPG Results

Effective high-level ATPG tools are increasingly needed, as an essential element in the quest for reducing as much as possible the designer work on gate-level descriptions. We propose a new set of benchmark circuits targeted to researchers working in the area of RT-level automatic test sequence generation. The developed benchmarks share the characteristics of typical synthesizable blocks, are available as both RTL VHDL descriptions and gate level netlists, and allow the evaluation of the quality of test sequences generated from RT-level descriptions in terms of attained coverage of gate-level stuck-at faults. Exploiting these benchmarks, we analyzed the effectiveness of a prototypical ATPG tool (called ARTIST) suitable to generate test sequences starting from synthesizable RT-level VHDL descriptions. ARTIST overcomes several limitations inherent with previously proposed approaches, especially in terms of accepted descriptions and level of automation. Also, ARTIST was extremely useful ...

• Type: Journal
• Year: 2000
• Where: DT
• Authors: Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
• Keywords: ATPG Tool, DT 2000, Test Sequences, VHDL Descriptions