SASIMI: sparsity-aware simulation of interconnect-dominated circuits with non-linear devices

We present a technique for the fast and accurate simulation of largescale VLSI interconnects with nonlinear devices, called SASIMI. The numerical efficiency of this technique is realized through linear-algebraic techniques that exploit the sparsity and structure of the matrices that are encountered in VLSI structures. Numerical results show that SASIMI is up to 1400 times as fast as commercial-grade SPICE, for moderatesize circuits, with little sacrifice in simulation accuracy.

• Type: Conference
• Year: 2006
• Where: ASPDAC
• Authors: Jitesh Jain, Stephen Cauley, Cheng-Kok Koh, Venkataramanan Balakrishnan
• Keywords: Accurate Simulation, ASPDAC 2006, Largescale Vlsi Interconnects, VLSI Structures