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SAC
2008
ACM

A self-balancing striping scheme for NAND-flash storage systems

13 years 12 months ago
A self-balancing striping scheme for NAND-flash storage systems
To use multiple memory banks in parallel is a nature approach to boost the performance of flash-memory storage systems. However, realistic data-access localities unevenly load each memory bank and thus the benefits of parallelism is severely limited. In this work, we propose to encode popular data with redundancy by means of erasure codes. Load balancing is thus achieved by accessing only lightly loaded banks, because to retrieve a subset of data blocks and code blocks sufficiently reconstructs the requested data. The technical issues pertain to redundancy allocation, redundancy placement, and request scheduling. By experiments, we found that, by offering 10% extra redundant space, the read response time is largely improved by 30%. Categories and Subject Descriptors D.4.2 [Operating Systems]: Garbage collection; B.3.2 [ Memory Structures]: Mass Storage General Terms Design, Performance, Algorithm. Keywords Flash Memory, Storage Systems, Embedded Systems.
Yu-Bin Chang, Li-Pin Chang
Added 28 Dec 2010
Updated 28 Dec 2010
Type Journal
Year 2008
Where SAC
Authors Yu-Bin Chang, Li-Pin Chang
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