Sequential circuit test generation using dynamic state traversal

A new method for state justi cation is proposed for sequential circuit test generation. The linear list of states dynamically obtained during the derivation of test vectors is used to guide the search during state justi cation. State-transfer sequences may already be known that drive the circuit from the current state to the target state. Otherwise, genetic engineering of existing state-transfer sequences is required. In both cases, genetic-algorithm-based techniques are used to generate valid state justi cation sequences for the circuit in the presence of the target fault. This approach achieves extremely high fault coverages and thus outperforms previous deterministic and simulation-based techniques.

• Type: Conference
• Year: 1997
• Where: DATE
• Authors: Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. Patel
• Keywords: DATE 1997, Hardware, Justi Cation Sequences, State Justi Cation, State-transfer Sequences