Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads

Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication behavior on shared memory multiprocessors. However, these systems require custom hardware in the memory controller for cache line assembly/disassembly, address translation between re-mapped and normal addresses, and coherence logic. In this paper we make the important observation that on a traditional flexible distributed shared memory (DSM) multiprocessor node, equipped with a coherence protocol thread context as in SMTp or a simple dedicated in-order protocol processing core as in a CMP, the address re-mapping techniques can be implemented in software running on the protocol thread or core without custom hardware in the memory controller while delivering high performance. We implement the active memory address re-mapping techniques of parallel reduction and matrix transpose (two popular kernels in scientific,...

• Type: Conference
• Year: 2007
• Where: ISPASS
• Authors: Dhiraj D. Kalamkar, Mainak Chaudhuri, Mark Heinrich
• Keywords: Address Re-mapping Techniques, ISPASS 2007, Memory Controller, Shared Memory, Software Engineering