Software Directed Issue Queue Power Reduction

The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling systems and additional packaging. In this paper we present a novel software assisted approach to power reduction where the processor dynamically resizes the issue queue based on compiler analysis. The compiler passes information to the processor about the number of entries needed which limits the number of instructions dispatched and resident in the queue. This saves power without adversely affecting performance. Compared with recently proposed hardware techniques, our approach is faster, simpler and saves more power. Using a simplistic scheme we achieve 47% dynamic and 31% static power savings in the issue queue with only a 2.2% performance loss. We then show that the performance loss

• Type: Conference
• Year: 2005
• Where: HPCA
• Authors: Antonio González, Jaume Abella, Michael F. P. O'Boyle, Timothy M. Jones
• Keywords: Computer Architecture, Dynamic Power, HPCA 2005, Issue Queue, Static Power Savings