Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction

Power delivery network (PDN) is a distributed RLC network with its dominant resonance frequency in the low-to-middle frequency range. Though high-performance chips’ working frequencies are much higher than this resonance frequency in general, chip runtime loading frequency is not. When a chip executes a chunk of instructions repeatedly, the induced current load may have harmonic components close to this resonance frequency, causing excessive power integrity degradation. Existing PDN design solutions are, however, mainly targeted at reducing high-frequency noise and not effective to suppress such resonance noise. In this work, we propose a novel approach to proactively suppress this type of noise. A method based on a high dimension generalized Markov process is developed to predict current load variation. Based on such prediction, a clock frequency actuator design is proposed to proactively select an optimal clock frequency to suppress the resonance. To the best of our knowledge, thi...

• Type: Conference
• Year: 2009
• Where: ASPDAC
• Authors: Yiyu Shi, Jinjun Xiong, Howard Chen, Lei He
• Keywords: ASPDAC 2009, Dominant Resonance Frequency, Hardware, Resonance Frequency, Resonance Noise