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VLSID
2007
IEEE

Synthesizing "Verification Aware" Models: Why and How?

14 years 12 months ago
Synthesizing "Verification Aware" Models: Why and How?
Malay K. Ganai, Akira Mukaiyama, Aarti Gupta, Kazu
Added 30 Nov 2009
Updated 30 Nov 2009
Type Conference
Year 2007
Where VLSID
Authors Malay K. Ganai, Akira Mukaiyama, Aarti Gupta, Kazutoshi Wakabayashi
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