Abstract. Visual data
ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally specied by signal
ow graphs. Although several academic and commercial frameworks provide a high level of abstraction for modeling DSP systems, they have drawbacks as design tools for FPGAs. They do not provide ecient implementations, and their system behavior only approximates the hardware implementation. In this paper, we describe a software system that employs a visual data
ow environment for system modeling and algorithm exploration. In this environment, the bit and cycle behavior of the FPGA implementation are manifest. By observing circuit behavior in the system environment, one obtains signicant speed improvement over hardware simulation, while gaining substantial
exibility aorded by functional abstraction. In addition, the software automatically generates a faithful hardware implementation from the system model. Specic ...