Test challenges for deep sub-micron technologies

The use of deep submicron process technologies presents several new challenges in the area of manufacturing test. While a significant body of work has been devoted to identifying and investigating design challenges in nanometer technologies, the impact on test strategies and methodologies is still not well understood. This paper highlights the challenges to current test methodologies arising from technology driven trends, and will present an overview of emerging techniques that address deep submicron test challenges.

• Type: Conference
• Year: 2000
• Where: DAC
• Authors: Kwang-Ting Cheng, Sujit Dey, Mike Rodgers, Kaushik Roy
• Keywords: Current Test Methodologies, DAC 2000, Deep Submicron Process, Design Automation, Submicron Test Challenges