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DATE
2007
IEEE

Testable design for advanced serial-link transceivers

14 years 5 months ago
Testable design for advanced serial-link transceivers
This paper describes a DfT solution for modern seriallink transceivers. We first summarize the architectures of the Crosstalk Canceller and the Equalizer used in advanced transceivers to which the proposed solution can be applied. The solution addresses the testability and observability issues of the transceiver for both characterization and production testing. Without using sophisticated testing instrument setting, the proposed solution could test the clock and data recovery circuit and characterize the decision-feedback equalizer in the receiver. Our experiments demonstrate that the proposed method has significant higher fault coverage and lower hardware requirement than the conventional approach of probing the eyeopening of the signals inside the transceiver.
Mitchell Lin, Kwang-Ting (Tim) Cheng
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where DATE
Authors Mitchell Lin, Kwang-Ting (Tim) Cheng
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