Thermal-Aware 3D IC Placement Via Transformation

- 3D IC technologies can help to improve circuit performance and lower power consumption by reducing wirelength. Also, 3D IC technology can be used to realize heterogeneous system-on-chip design, by integrating different modules together with less interference with each other. In this paper, we propose a novel thermal-aware 3D cell placement approach, named T3Place, based on transforming a 2D placement with good wirelength to a 3D placement, with the objectives of half-perimeter wirelength, through-the-silicon (TS) via number and temperature. T3Place is composed of two steps, transformation from a 2D placement to a 3D placement and the refinement of the resulting 3D placement. We proposed and compared several different transformation techniques, including local stacking transformation (LST), folding-2, folding-4 and window-based stacking/folding transformation, and concluded that (i) LST can generate 3D placements with the least wirelength, (ii) the folding-based transformations result...

• Type: Conference
• Year: 2007
• Where: ASPDAC
• Authors: Jason Cong, Guojie Luo, Jie Wei, Yan Zhang
• Keywords: ASPDAC 2007, Graph-based Layer Assignment, Hardware, Thermal-aware 3D Cell, Window-based Stacking/folding Transformations