Thermal Switching Error Versus Delay Tradeoffs in Clocked QCA Circuits

Abstract--The quantum-dot cellular automata (QCA) model offers a novel nano-domain computing architecture by mapping the intended logic onto the lowest energy configuration of a collection of QCA cells, each with two possible ground states. A four-phased clocking scheme has been suggested to keep the computations at the ground state throughout the circuit. This clocking scheme, however, induces latency or delay in the transmission of information from input to output. In this paper, we study the interplay of computing error behavior with delay or latency of computation induced by the clocking scheme. Computing errors in QCA circuits can arise due to the failure of the clocking scheme to switch portions of the circuit to the ground state with change in input. Some of these non-ground states will result in output errors and some will not. The larger the size of each clocking zone, i.e., the greater the number of cells in each zone, the more the probability of computing errors. However, la...

• Type: Journal
• Year: 2008
• Where: TVLSI
• Authors: Sanjukta Bhanja, Sudeep Sarkar
• Keywords: Clocking Scheme, Ground State, Qca Cell, TVLSI 2008