Topological Placement with Multiple Symmetry Groups of Devices for Analog Layout Design

Abstract– This paper presents an improved topological algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible sequence-pairs [1], the technique employs an efficient model of priority queue [3]. The use of this data structure entails a complexity of O(G·n log log n) for each code evaluation, where n and G are the numbers of devices and symmetry groups, which is better than the complexity of other existent topological placement algorithms supporting symmetry constraints. The computation times exhibited by this approach are significantly better than those of the algorithms using an exploration strategy based on the absolute representation, as well as those of other previous topological algorithms.

• Type: Conference
• Year: 2007
• Where: ISCAS
• Authors: Karthik Krishnamoorthy, Sarat C. Maruvada, Florin Balasa
• Keywords: Improved Topological Algorithm, ISCAS 2007, Symmetry Constraints, Topological Algorithms