Towards fault-tolerant embedded systems with imperfect fault detection

Many state-of-the-art approaches on fault-tolerant system design make the simplifying assumption that all faults are detected within a certain time interval. However, based on a detailed experimental analysis, we observe that perfect fault detection is not only an impractical assumption but even if implementable also a suboptimal design decision. This paper presents an approach that takes imperfect fault detection into account. Novel analysis and optimization techniques are developed, which distinguish detectable and undetectable faults in the overall workflow. Besides synthesizing the task schedules, our approach also decides which of the available fault detectors is selected for each task instance. Experimental results show that our approach finds solutions with several orders of magnitude higher reliability than current approaches. Categories and Subject Descriptors B.8.1 [Performance and Reliability]: Reliability, Testing, and Fault-Tolerance; C.3 [special-purpose and applicatio...

• Type: Journal
• Year: 2012
• Where: DAC
• Authors: Jia Huang, Kai Huang, Andreas Raabe, Christian Buckl, Alois Knoll
• Keywords: Computer Architecture, DAC 2012, Fault Tolerant System, Reliability Design, Tolerant System Design