Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs

This paper presents a method that offers a uniform treatment for bit-width optimisation of both fixed-point and floating-point designs. Our work utilises automatic differentiation to compute the sensitivities of outputs to the bitwidth of the various operands in the design. This sensitivity analysis enables us to explore and compare fixed-point and floating-point implementation for a particular design. As a result we can automate the selection of the optimal number representation for each variable in a design to optimize area and performance. We implement our method in the BitSize tool targeting reconfigurable architectures, which takes user-defined constraints to direct the optimisation procedure. We illustrate our approach using applications such as ray-tracing and function approximation.

• Type: Conference
• Year: 2004
• Where: FCCM
• Authors: Altaf Abdul Gaffar, Oskar Mencer, Wayne Luk, Peter Y. K. Cheung
• Keywords: Bit-width Optimisation, FCCM 2004, Floating-point Designs, Floating-point Implementation, VLSI