Validation and Verification of the Simulation Model of a Photolithography Process in Semiconductor Manufacturing

Simulation modeling provides an effective and powerful approach for capturing and analyzing complex manufacturing systems. More and more decisions are based on computer generated data derived from simulation. The strength of these decisions is a direct function of the validity of this data. Thus the need for efficient and objective methods to verify and validate simulation models is greater than ever. The validation of a simulation is generally acknowledged as an integral part of a simulation project. But in a vast majority of the reported applications of simulation, there is no mention of verification and validation. In this paper, the issue of formal verification and validation of a semiconductor manufacturing simulation model is addressed. A simulation model of the photo area of the clean room of Cirent Semiconductor in Orlando, Florida was built. Various approaches for verification and validation were applied and a valid semiconductor manufacturing simulation model was developed.

• Type: Conference
• Year: 1998
• Where: WSC
• Authors: Nirupama Nayani, Mansooreh Mollaghasemi
• Keywords: Manufacturing Simulation Model, Modeling And Simulation, Semiconductor Manufacturing Simulation, Simulation Model, WSC 1998