Versatile system-level memory-aware platform description approach for embedded MPSoCs

In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations. In contrast to previous system modeling approaches this approach tries to model the whole system and especially the memory hierarchy in a structural and semantically accessible way. Previous approaches primarily support generation of simulators or retargetable code selectors and thus concentrate on pure behavioral models or describe only the processor instruction set in a semantically accessible way, A simple, database-like, interface is offered to the optimization developer, which in conjunction with the MACCv2 framework enables rapid development of source-level architecture independent optimizations. Categories and Subject Descriptors B3.3 [Memory Structures]: Performance Analysis and Design Aids; D.2.2 [Design Tools and Techniques]: Computer-aided software engineering; C0 [General]: System architectures; C4 [Performance of Sys...

• Type: Conference
• Year: 2010
• Where: LCTRTS
• Authors: Robert Pyka, Felipe Klein, Peter Marwedel, Stylianos Mamagkakis
• Keywords: Accessible Way, Architecture Independent Optimizations, LCTRTS 2010, Software Engineering, Source-level Multiprocessor Memory