Sciweavers

LCTRTS
2010
Springer
13 years 9 months ago
Improving both the performance benefits and speed of optimization phase sequence searches
The issues of compiler optimization phase ordering and selection present important challenges to compiler developers in several domains, and in particular to the speed, code size,...
Prasad A. Kulkarni, Michael R. Jantz, David B. Wha...
LCTRTS
2010
Springer
13 years 9 months ago
Integrating safety analysis into the model-based development toolchain of automotive embedded systems
The automotive industry has a growing demand for the seamless integration of safety analysis tools into the model-based development toolchain for embedded systems. This requires t...
Matthias Biehl, De-Jiu Chen, Martin Törngren
LCTRTS
2010
Springer
13 years 9 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
LCTRTS
2010
Springer
13 years 9 months ago
Translating concurrent action oriented specifications to synchronous guarded actions
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Jens Brandt, Klaus Schneider, Sandeep K. Shukla
LCTRTS
2010
Springer
13 years 9 months ago
RNFTL: a reuse-aware NAND flash translation layer for flash memory
In this paper, we propose a hybrid-level flash translation layer (FTL) called RNFTL (Reuse-Aware NFTL) to improve the endurance and space utilization of NAND flash memory. Our bas...
Yi Wang, Duo Liu, Meng Wang, Zhiwei Qin, Zili Shao...
LCTRTS
2010
Springer
14 years 1 months ago
An efficient code update scheme for DSP applications in mobile embedded systems
DSP processors usually provide dedicated address generation units (AGUs) to assist address computation. By carefully allocating variables in the memory, DSP compilers take advanta...
Weijia Li, Youtao Zhang
LCTRTS
2010
Springer
14 years 1 months ago
Resilience analysis: tightening the CRPD bound for set-associative caches
In preemptive real-time systems, scheduling analyses need—in addition to the worst-case execution time—the context-switch cost. In case of preemption, the preempted and the pr...
Sebastian Altmeyer, Claire Maiza, Jan Reineke
LCTRTS
2010
Springer
14 years 4 months ago
Cache vulnerability equations for protecting data in embedded processor caches from soft errors
Continuous technology scaling has brought us to a point, where transistors have become extremely susceptible to cosmic radiation strikes, or soft errors. Inside the processor, cac...
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
LCTRTS
2010
Springer
14 years 6 months ago
Sampling-based program execution monitoring
For its high overall cost during product development, program debugging is an important aspect of system development. Debugging is a hard and complex activity, especially in time-...
Sebastian Fischmeister, Yanmeng Ba
LCTRTS
2010
Springer
14 years 6 months ago
Semi-automatic derivation of timing models for WCET analysis
Marc Schlickling, Markus Pister